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Showing 1 to 20 of 27 for “"MOS-Transistors"”.

  1. 1/f surface noise in Mos transistors

    Made available in DSpace on 2014-12-08T22:24:04Z (GMT). No. of bitstreams: 1 6706631.pdf: 2926893 bytes, checksum: 8233428a948c077c63135fb22d7a5b0e (MD5) Previous issue date: 1966

    uiuc Repository record for 1/f surface noise in Mos transistors (opens in a new tab)

  2. Large signal linearity of scaled MOS transistors

    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1987.

    mit Repository record for Large signal linearity of scaled MOS transistors (opens in a new tab)

  3. Generation-Recombination Noise in Gold-Doped Silicon Mos Transistors

    Made available in DSpace on 2014-12-08T22:24:35Z (GMT). No. of bitstreams: 1 6915424.pdf: 2506667 bytes, checksum: efd71ab4aa16e113e90d49080bfb44d7 (MD5) Previous issue date: 1969

    uiuc Repository record for Generation-Recombination Noise in Gold-Doped Silicon Mos Transistors (opens in a new tab)

  4. High performance MoStransistors based on wafer-scale low-temperature MOCVD synthesis

    … lower than 400°C. Highly-scaled high-performance MoStransistors will also be investigated with different contact engineering methods. These findings represent crucial steps for high performance power electronic circuits as well as realizing ultra-large scale BEOL integration with silicon …

    mit Repository record for High performance MoS₂ transistors based on wafer-scale low-temperature MOCVD synthesis (opens in a new tab)

  5. Physical and Electrical Properties of Hot -Carrier Degradation of Silicon *Mos Transistors Processed in Deuterium and Hydrogen

    … study the benefits of the deuterium annealing of MOS transistors to achieve hot-carrier lifetime improvement. Deuterium processing as a function of the process parameters such as temperature, time, and pressure for MOS transistors with one level and multilevels of metalization has been studied. …

    uiuc Repository record for Physical and Electrical Properties of Hot -Carrier Degradation of Silicon *Mos Transistors Processed in Deuterium and Hydrogen (opens in a new tab)

  6. Design-technology Co-optimization for Sub-2 nm Technology Node Based on 2D Materials

    … integrated into the design and optimization of MoS₂-based multichannel transistors (MCTs). With the help of DTCO, we have achieved record performance for double-gate, single-channel MoStransistors as well as the first demonstration of high-performance, functional double channel MoS₂ …

    mit Repository record for Design-technology Co-optimization for Sub-2 nm Technology Node Based on 2D Materials (opens in a new tab)

  7. Linearity improvement technique for CMOS continuous-time filters

    … of passive resistors and current-steering MOS transistors as a variable resistance element is applied in the implementation of low-distortion continuous-time filters in complementary metal-oxide-semiconductor (CMOS) technology. This work is motivated by the fact that to date, most of the …

    uiuc Repository record for Linearity improvement technique for CMOS continuous-time filters (opens in a new tab)

  8. Switch-Level Timing Simulation of Mos Vlsi Circuits

    … (VLSI) circuits of metal-oxide-semiconductor (MOS) transistors. Such tools are called switch-level timing simulators and they provide adequate information on the performance of the circuits with a reasonable expenditure of computation time even for very large circuits. The algorithms presented …

    uiuc Repository record for Switch-Level Timing Simulation of Mos Vlsi Circuits (opens in a new tab)

  9. Vertically integrated transistors for field emission applications

    … has shown the feasibility of using integrated MOSFETs to control and enhance field emission stability and operating characteristics. This research effort investigates the integration of vertical MOS transistors with field emitter arrays as a means to enhance field emission device capabilities …

    mit Repository record for Vertically integrated transistors for field emission applications (opens in a new tab)

  10. High Voltage Analog Design in a Standard Digital CMOS Process

    … has been realized in a modified 5V 0.6um CMOS process using 40V high-voltage MOS transistors that do not affect low-voltage device functionality. These circuits include a high-voltage, low-offset current sense amplifier, which achieves a common-mode input range that is within a Vtp of Vdd …

    byu Repository record for High Voltage Analog Design in a Standard Digital CMOS Process (opens in a new tab)

  11. Characterization and modeling of low-frequency noise in MOSFETs

    … In the last years, the advance made in CMOS technology allowed analog and RF circuits to be built with such a technology, but the use of CMOS technology in RF application instead of bipolar technology has brought more issues in terms of noise. The noise cannot be completely eliminated and …

    bologna Repository record for Characterization and modeling of low-frequency noise in MOSFETs (opens in a new tab)

  12. Fast timing simulation of MOS VLSI circuits

    … simulator for digital metal-oxide semiconductor (MOS) very large scale integrated (VLSI) circuits. Verification of the correct operation of VLSI circuits is a very costly process. Therefore, the development of faster verification tools is very important. Fast timing simulation attempts to extract …

    uiuc Repository record for Fast timing simulation of MOS VLSI circuits (opens in a new tab)

  13. A 0.45 V low power high PSRR subthreshold CMOS voltage reference

    … to meet the low power requirement is to operate MOSFETs in subthreshold region. Most often, forward biased PN-junctions of BGRs are substituted with MOSFETs biased in the subthreshold region and achieves a supply voltage down to 0.6 V.\par This paper presents a sub-1V voltage reference circuit …

    umn Repository record for A 0.45 V low power high PSRR subthreshold CMOS voltage reference (opens in a new tab)

  14. Investigation Of High-k Gate Dielectrics And Metals For Mosfet Devices.

    … made feasible high- k dielectric materials for MOS transistors. The continued scaling of CMOS devices is pushing the Si-SiO2 to its limit to consider high-k gate dielectrics. The demand for faster, low power, smaller, less expensive devices with good functionality and higher performance …

    ucf

  15. Device and circuit-level models for carbon nanotube and graphene nanoribbon transistors

    … semiconductor field-effect transistor (MOSFET) scaling throughout the years has enabled us to pack million of MOS transistors on a single chip to keep in pace with Moore’s Law. After forty years of advances in integrated circuit (IC) technology, the scaling of silicon (Si) MOSFET has …

    cambridge Repository record for Device and circuit-level models for carbon nanotube and graphene nanoribbon transistors (opens in a new tab)

  16. Modelling and applications of MOS varactors for high-speed CMOS clock and data recovery

    … and circuits used in this versatile system in CMOS technology. Of these blocks, we have identified the voltage-controlled oscillator (VCO) as an important circuit that contributes to the total noise performance of the CDR. Among different solutions known for this circuit, LC-VCO is acknowledged …

    ubc Repository record for Modelling and applications of MOS varactors for high-speed CMOS clock and data recovery (opens in a new tab)

  17. MoS₂ electronics : technology, high yield circuits and applications

    … electronics based on single-layer MoS₂ synthesized by chemical vapor deposition (CVD) offers significant advantages for realizing large-scale flexible systems owing to the ultrathin nature, excellent transport properties and stable crystalline structure of MoS₂. Despite all the …

    mit Repository record for MoS₂ electronics : technology, high yield circuits and applications (opens in a new tab)

  18. Phase Noise in CMOS Phase-Locked Loop Circuits

    … simulations and experiments. Phase noise of a CMOS phase-locked loop as a frequency synthesizer circuit is modeled from the superposition of noises from its building blocks: voltage-controlled oscillator, frequency divider, phase-frequency detector, loop filter and auxiliary input reference …

    lsu-thes Repository record for Phase Noise in CMOS Phase-Locked Loop Circuits (opens in a new tab)

  19. Investigations of electron scattering mechanisms at the silicon-silicon dioxide interface

    … using n-channel metal-oxide-semiconductor (MOS) transistors for a wide change in impurity concentration are compared with the theoretical curves. These transistors were fabricated with the lowest possible number of surface states. For thermally oxidized silicon surfaces with minimum surface …

    uiuc Repository record for Investigations of electron scattering mechanisms at the silicon-silicon dioxide interface (opens in a new tab)

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