Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 17 of 17 for “"Fault testing"”.
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Fault Testing in Combinational Cellular Arrays
Made available in DSpace on 2014-12-10T19:06:36Z (GMT). No. of bitstreams: 1 7105231.pdf: 1958542 bytes, checksum: 194067a2f2cab264be2e116a7ab5a89c (MD5) Previous issue date: 1970
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ATPG and DFT Algorithms for Delay Fault Testing
… and increasing clock rate on chips, delay testing is becoming a necessity in industry to maintain test quality for speed-related failures. The purpose of delay testing is to verify that the circuit operates correctly at the rated speed. However, functional tests for delay defects are …
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Experimental Study of Scan Based Transition Fault Testing Techniques
… delay-inducing defects, scan-based transition fault testing techniques are being implemented. There exist organized techniques to generate test patterns for the transition fault model and the two popular methods being used are Broad-side delay test (Launch-from-capture) and Skewed load delay …
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An investigation of delay fault testing for multi voltage design
… work is aimed at finding a generalised delay testing method for MVD. There has been little work to date on testing such systems, but testing the smallest number of operating voltages reduces testing costs. In the initial stage, the impact of varying supply voltage on different types of …
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Alternate Fault testing on a Bus on a Dynamic Position Vessel
Direct fault testing onboard Dynamic Position Vessels is a requirement to maintain the ships classification and ensure redundancy of the power system onboard to maintain position. The most vulnerable part of the ship when testing occurs is when a three phase fault is placed on a main bus. This puts …
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New Techniques to Verify Timing Correctness of Integrated Circuits
… the relationship between false paths and delay fault testing is also presented. We first show an example where a circuit that does not have any delay variations behaves incorrectly during normal operation due to the common assumptions on false paths used in determining the clock cycle time. We …
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Development and Implementation of a Fault Mitigating Control System for a Biodiesel Plug-In Hybrid Electric Vehicle for the EcoCar: The NeXt Challenge Competition
… safety protocols, solutions to problems through fault testing, and validating and verifying the control architecture throughout the whole process. Testing and evaluation plans are required more than ever and are constantly being updated and implemented in today's automotive production standards. …
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TENOR: an ATPG for transition faults in combinational circuits
Delay fault testing of high speed VLSI circuits is becoming increasingly important. This thesis presents an Automatic Test Pattern Generator (ATPG), called TENOR, for transition faults. Transition faults are a special case of gate delay faults. Test generation is based on the FAN algorithm. The …
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Anisotropic wave guides-- propagation, focusing and dispersive phenomena with applications for non-destructive testing.
Acoustic Non-Destructive Testing (NDT) has a long history of applications in fatigue monitoring, fault testing, and more recently production control. A very large family of manufactured and raw materials consist of thin layers. Some examples include rolled aluminum, window glass, plywood, …
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Behavioral delay fault modeling and test generation
… operation of VLSI devices has increased, delay fault testing has become a more important factor in VLSI testing. Due to the large number of gates in a VLSI circuit, the gate level test generation methodologies may become infeasible for delay test generation. In this work, a new behavioral delay …
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The Development of an Adaptive Control System for a Phase-Locked Excitation (PhLEX) Method for Advanced Wind Turbine Blade Fatigue Testing
… means necessary for advanced wind turbine blade testing. To improve on the current testing methods, a new testing method is being developed using the existing dual-axis fatigue testing capabilities in conjunction with another actuator to provide a phase-locked excitation method with adaptive …
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Development of expert systems as on-line operational aids
… and heuristic rules for Customer Restoration And Fault Testing (CRAFT) of power lines with automatic switches. The other, referred to as VCES (Voltage Control Expert System), integrated numerical and heuristic techniques for reactive power/voltage control in a power system. Both expert systems are …
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Fast Static Learning and Inductive Reasoning with Applications to ATPG Problems
… the invariants are utilized for untestable fault identification and to constrain ATPG for path delay fault testing, with positive results.
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Functional testing techniques for new massive data processing paradigms
… such as the allocation of the resources and the fault tolerance mechanism, among others. As a consequence, a program can behave differently at each execution because it is automatically adapted to the resources available at each moment. This non-deterministic execution makes both software testing …
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Vibration Analysis Processes In Noisy Environments For thePurposes of Condition Based Maintenance and theSignificance of Regime Recognition
… has constructed three test stands and operated a testing facility in order to acquire aircraft component data for the purposes of improving vibration monitoring algorithms. The original intent of this research was to monitor seeded fault bearings and differentiate those vibration signatures from …
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Full Custom VLSI Design of On-Line Stability Checkers
… very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course …
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Search-space Aware Learning Techniques for Unbounded Model Checking and Path Delay Testing
… two related problems in Design Verification and Testing: Unbounded Model Checking and Path Delay Fault Testing, that commonly suffer from extremely large memory requirements. We propose efficient representations and intelligent learning techniques that reason on the problem structure and take …