CMOS fingerprint sensor electrostatic modeling

The use of Biometrics in personal identification is an important emerging technology in modern electronic society. Fingerprints are one of the most popular biometric technologies, currently used in majority of biometric applications. In recent years, solid-state capacitive fingerprint sensors which image fingerprints using Silicon CMOS Technology are gaining much acceptance in the market. This research work is carried out to quantify and explore approaches for achieving improved sensitivity of the capacitive imaging process through reduction of parasitic capacitances and sensor cell scaling for future generation devices. Evaluation of sensor cell and array geometries was completed using a commercial 2-D electrostatic field solver. The modeling activities performed include analysis of sensor cell and sensor plate size, their relationships, evaluation of ESD ring coupling, and exploration of cell and array layout approaches for achieving reduced parasitic capacitance.

Name thesis:degree_name

MS

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Lane Department of Computer Science and Electrical Engineering

Year dc:date.available

2001

Author dc:creator

• Soora, Praveen Kumar

Contributors dc:contributor

• Lawrence A. Hornak.

• Electrical engineering
• Biomedical engineering

Identifier

https://researchrepository.wvu.edu/etd/1174

OAI identifier oai:identifier

oai:researchrepository.wvu.edu:etd-2177