Automatic Generation of Efficient Parallel Streaming Structures for Hardware Implementation

Digital signal processing systems demand higher computational performance and more operations per second than ever before, and this trend is not expected to end any time soon. Processing architectures must adapt in order to meet these demands. The two techniques most prevalent for achieving throughput constraints are parallel processing and stream processing. By combining these techniques, significant throughput improvements have been achieved. These preliminary results apply to specific applications, and general tools for automation are in their infancy. In this dissertation techniques are developed to automatically generate efficient parallel streaming hardware architectures.

Name thesis:degree_name

Ph. D.

Level thesis:degree_level

doctoral

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical and ComputerEngineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

2016

Author dc:creator

• Koehn, Thaddeus E.

Chair dc:contributor.committeechair

• Athanas, Peter M.

Committee members dc:contributor.committeemember

• Ernst, Joseph M.
• Dietrich, Carl B.
• Buehrer, R. Michael
• McGwier, Robert W.

• Streaming
• Field programmable gate arrays
• Hardware
• Digital Signal Processing
• Permutation

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Dc Identifier Other

vt_gsexam:9096

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/83391