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Showing 1 to 20 of 188 for “"Hardware Implementation"”.

  1. Raw fabric hardware implementation and characterization

    … thesis walks through the important design and implementation challenges and documents how they were solved. The most basic challenge faced was to design a system flexible enough to accommodate a variety of Fabric sizes.

    mit Repository record for Raw fabric hardware implementation and characterization (opens in a new tab)

  2. Hardware implementation of the Advanced Encryption Standard

    This project implements a hardware solution to the Advanced Encryption Standard (AES) algorithm and interfaces to IBM's CoreConnect Bus Architecture. The project is IBM SoftCore compliant, is synthesized to the .18 micron CMOS double-well technology, runs at 133 MHz, and is approximately 706K for …

    mit Repository record for Hardware implementation of the Advanced Encryption Standard (opens in a new tab)

  3. Hardware implementation of wireless bit rate adaptation

    This thesis presents a hardware implementation of the SoftRate bit-rate adaptation protocol. SoftRate is a new bit-rate adaptation protocol, which uses per-bit confidence hints generated by the convolutional decoder to estimate the channel bit-error rate. Implementing SoftRate requires changes to …

    mit Repository record for Hardware implementation of wireless bit rate adaptation (opens in a new tab)

  4. Hardware Implementation of a Novel Image Compression Algorithm

    Image-related communications are forming an increasingly large part of modern communications, bringing the need for efficient and effective compression. Image compression is important for effective storage and transmission of images. Many techniques have been developed in the past, including …

    uno Repository record for Hardware Implementation of a Novel Image Compression Algorithm (opens in a new tab)

  5. Multiobjective RF Communication Networks: Theory and Hardware Implementation

    … costs. On the other side, by developing a hardware solution that realizes a very specific transmission scheme for an individual network node: beamforming. Instead of a single antenna broadcasting information in the spatial directions dictated by its design, beamforming entails a system of …

    houston Repository record for Multiobjective RF Communication Networks: Theory and Hardware Implementation (opens in a new tab)

  6. On Hardware Implementation of Discrete-Time Cellular Neural Networks

    … gives CNNs first-hand advantages for tiled VLSI implementations with very high speed and complexity. The first VLSI implementation has been based on analogue technology but was small and suffered from parasitic capacitances and resistances leading to undesired behaviour. Later implementations …

    lund Repository record for On Hardware Implementation of Discrete-Time Cellular Neural Networks (opens in a new tab)

  7. Hardware Implementation of a Complete Vision-Based Navigation Pipeline

    … made great advances, but many of the successful hardware systems are reliant on LiDAR. LiDAR is known to be expensive and to have high computation cost, while vision, which is typically used in combination with LiDAR, has additional benefits without the same cost concerns. It would be ideal if …

    mit Repository record for Hardware Implementation of a Complete Vision-Based Navigation Pipeline (opens in a new tab)

  8. Efficiency of Logic Minimization Techniques for Cryptographic Hardware Implementation

    … count are extensively used in estimating their hardware quality. Specialized logic minimization tools have been built to make use of gate count as the primary optimization cost function. The first part of this thesis aims to investigate the effectiveness of such logical metrics in predicting …

    vt Repository record for Efficiency of Logic Minimization Techniques for Cryptographic Hardware Implementation (opens in a new tab)

  9. Flight simulation and hardware implementation of deep model predictive control

    Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2023-12-01

    uiuc Repository record for Flight simulation and hardware implementation of deep model predictive control (opens in a new tab)

  10. Hardware implementation and evaluation of the Spandex cache coherence protocol

    Emerging heterogeneous hardware systems and applications that have shared data between multiple CPU cores and computation accelerators bring the need for efficient and flexible cache coherence support. Since different devices like CPUs, GPUs and accelerators have diverse memory demands and …

    uiuc Repository record for Hardware implementation and evaluation of the Spandex cache coherence protocol (opens in a new tab)

  11. Digital image warping : theory and real time hardware implementation issues

    Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.

    mit Repository record for Digital image warping : theory and real time hardware implementation issues (opens in a new tab)

  12. Anti-Counterfeit and Anti-Tamper Hardware Implementation using Hardware Obfuscation

    … and Reverse Engineering of a chip to extract the hardware Intellectual Property (IP) core or to inject malicious alterations is a major concern. First, offshore chip manufacturing allows the design secrets of the IP cores to be transparent to the foundry and other entities along the production …

    vt Repository record for Anti-Counterfeit and Anti-Tamper Hardware Implementation using Hardware Obfuscation (opens in a new tab)

  13. Hardware implementation for cardiac electrical excitation and conduction using an FPGA

    … time required for the simulation, a hardware implementation of cardiac electrical excitation-conduction analysis system has been developed based on FitzHugh-Nagumo (FHN) model for a mammalian cardiac ventricular cell. In this research, one dimensional (1D) ring-shaped cable model with …

    uthm Repository record for Hardware implementation for cardiac electrical excitation and conduction using an FPGA (opens in a new tab)

  14. Hardware implementation of an automatic adaptive centralized under frequency load shedding

    … UFLS schemes. With the aid of new technology hardware that enables the implementation of Wide Area Monitoring Protection and Control (WAMPC) application, this gives the opportunity for using industrial grade hardware to implement, evaluate these schemes and, therefore, to validate the recent …

    utc Repository record for Hardware implementation of an automatic adaptive centralized under frequency load shedding (opens in a new tab)

  15. Hardware implementation of a low-power two-dimensional discrete cosine transform

    In this project, a JPEG compliant, low-power dedicated, two-dimensional, Discrete Cosine Transform (DCT) core meeting all IBM Softcore requirements is developed. Power is optimized completely at the algorithmic, architectural, and logic levels. The architecture uses row-column decomposition of a …

    mit Repository record for Hardware implementation of a low-power two-dimensional discrete cosine transform (opens in a new tab)

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