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Virginia Polytechnic Institute and State University

Designing FET based multiple valued logic circuits

Abstract

dc:description.abstract

The thesis presents an analysis of FET based Multiple Valued Logic circuits. The circuit analysis program SPICE2 was used to analyze these circuits. A description of device modelling as done by SPICE2 is included in the beginning of the thesis. Techniques to implement MVL circuits using simple threshold circuits as building blocks are outlined. The two principal methods of achieving different switching voltages, namely, changing the device threshold and the device transconductance, for these threshold circuits are discussed. A comparative study of these two methods from a theoretical and practical viewpoint is included. Several MOSFET based MVL circuits are developed and an explanation of their operation is also given.

Degree

thesis:*
Name thesis:degree_name
Master of Science
Level thesis:degree_level
masters
Discipline thesis:degree_discipline
Electrical Engineering
Department dc:contributor.department
Electrical Engineering
Grantor dc:publisher
Virginia Polytechnic Institute and State University
Year dc:date.issued
1982

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Thakar, Anjaneya V.

Rights

dc:rights
Statement dc:rights
  • In Copyright
Language dc:language.iso
en_US

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/10919/82662
OAI identifier oai:identifier
oai:vtechworks.lib.vt.edu:10919/82662

Chain of custody

source
Harvested from
Virginia Tech
Base URL
vtechworks.lib.vt.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
related terms
citation

Thakar, Anjaneya V.. Designing FET based multiple valued logic circuits. masters thesis, Virginia Polytechnic Institute and State University, 1982. http://hdl.handle.net/10919/82662