Mixed As/Sb and tensile strained Ge/InGaAs heterostructures for low-power tunnel field effect transistors

Reducing supply voltage is a promising way to address the power dissipation in nano-electronic circuits. However, the fundamental lower limit of subthreshold slope (SS) within metal-oxide-semiconductor field-effect transistors (MOSFETs) is a major obstacle to further scaling the operation voltage without degrading ON/OFF-ratio in today's integrated circuits. Tunnel field-effect transistors (TFETs) benefit from steep switching characteristics due to the quantum-mechanical tunneling injection of carriers from source to channel, rather than by conventional thermionic emission in MOSFETs. TFETs based on group III-V compound semiconductor and Ge heterostructures further improve the ON-state current and reduce SS due to the low bandgap energies and smaller carrier tunneling mass. The mixed arsenide/antimonide (As/Sb) InxGa1-xAs/GaAsySb1-y and Ge/InxGa1-xAs heterostructures allow a wide range of bandgap energies and various band alignments depending on the alloy compositions in the source and channel materials. Band alignments at source/channel heterointerface can be well modulated by carefully controlling the compositions of the InxGa1-xAs or GaAsySb1-y. In particular, this research systematically investigate the development and optimization of low-power TFETs using mixed As/Sb and Ge/InxGa1-xAs based heterostructures including: basic working principles, design considerations, material growth, interface engineering, material characterization, band alignment determination, device fabrication, device performance investigation, and high-temperature reliability. A comprehensive study of TFETs using mixed As/Sb and Ge/InxGa1-xAs based heterostructures shows superior structural properties and distinguished device performances, both of which indicate the mixed As/Sb and Ge/InxGa1-xAs based TFET as a promising option for high performance, low standby power and energy efficient logic circuit application.

Name thesis:degree_name

Ph. D.

Level thesis:degree_level

doctoral

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical and Computer Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

2014

Author dc:creator

• Zhu, Yan

Chair dc:contributor.committeechair

• Hudait, Mantu K.

Committee members dc:contributor.committeemember

• Tao, Chenggang
• Agah, Masoud
• Manteghi, Majid
• Lester, Luke F.

• Tunnel field-effect-transistor
• mixed As/Sb and Ge heterostructures
• molecular beam epitaxy
• heterointerface engineering
• high temperature reliability analysis
• structure and device characterization

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Dc Identifier Other

vt_gsexam:2599

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/47791