Implementation of coarse-to-fine visual tracking on a custom computing machine

“Smart” surveillance systems require a visual tracking system that is able to detect and follow a moving target in the field of view of a camera. Visual tracking systems have been traditionally developed either as application specific hardware or as software written for parallel architectures because of the large number of computations that have to be performed at very high speeds. This thesis describes the implementations of two visual tracking systems on a custom computing machine based on Field Programmable Gate Arrays (FPGAs). The implementations apply a coarse-to-fine search on Gaussian pyramids constructed from the images generated by a camera. One system tracks a target of size 16x16 in an image sequence with output images of size 256x256. This system is capable of operating at 30 pyramids per second. The second system tracks a target of size 16x16 in an image sequence with output images of size 512x512. This system is capable of operating at 15 pyramids per second. Both systems are designed with pipelined architectures and numerical computations are handled using a SIMD approach.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

1996

Author dc:creator

• Pudipeddi, Bharadwaj

• tracking
• Gaussian pyramid
• custom computing machines
• FPGAs
• computer architecture

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Dc Identifier Other

etd-11072008-063323

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/45460