FPGA Implementation of a Pseudo-Random Aggregate Spectrum Generator for RF Hardware Test and Evaluation

Test and evaluation (TandE) is a critically important step before in-the-field deployment of radio-frequency (RF) hardware in order to assure that the hardware meets its design requirements and specifications. Typically, TandE is performed either in a lab setting utilizing a software simulation environment or through real-world field testing. While the former approach is typically limited by the accuracy of the simulation models (particularly of the anticipated hardware effects) and by non-real-time data rates, the latter can be extremely costly in terms of time, money, and manpower. To build upon the strengths of these approaches and to mitigate their weaknesses, this work presents the development of an FPGA-based TandE tool that allows for real-time pseudo-random aggregate signal generation for testing RF receiver hardware (such as communication receivers, spectrum sensors, etc.). In particular, a framework is developed for an FPGA-based implementation of a test signal emulator that generates randomized aggregate spectral environments containing signals with random parameters such as center frequencies, bandwidths, start times, and durations, as well as receiver and channel effects such as additive white Gaussian noise (AWGN). To test the accuracy of the developed spectrum generation framework, the randomization properties of the framework are analyzed to assure correct probability distributions and independence. Additionally, FPGA implementation decisions, such as bit precision versus accuracy of the generated signal and the impact on the FPGA's hardware footprint, are analyzed.This analysis allows the test signal engineer to make informed decisions while designing a hardware-based RF test system. This framework is easily extensible to other signal types and channel models, and can be used to test a variety of signal-based applications.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

2020

Author dc:creator

• Baweja, Randeep Singh

Chairs dc:contributor.committeechair

• Headley, William C.
• Dhillon, Harpreet Singh

Committee members dc:contributor.committeemember

• Michaels, Alan J.
• Schaumont, Patrick R.

• periodicity
• digital signal processing
• look-up table
• modulation scheme
• transmitter

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Dc Identifier Other

vt_gsexam:27651

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/100325