Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 15 of 15 for “"Hardware Test"”.
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FPGA Implementation of a Pseudo-Random Aggregate Spectrum Generator for RF Hardware Test and Evaluation
Test and evaluation (TandE) is a critically important step before in-the-field deployment of radio-frequency (RF) hardware in order to assure that the hardware meets its design requirements and specifications. Typically, TandE is performed either in a lab setting utilizing a software simulation …
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Real Time Signal Processing for Multi-Antenna Systems and experimental Verification on a reconfigurable Hardware Test-bed
… zeigt, daß eine Umsetzung bereits auf heutiger Hardware möglich ist. Eine wesentliche Voraussetzung für die Umsetzung der entwickelten MIMO-Übertragungstechniken ist eine sorgfältige Anforderungsanalyse und Algorithmenoptimierung der notwendigen Basisbandalgorithmen beson-ders bezüglich einer …
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An improved perturbation and observation in MPPT control using buck-boost converter in solar panel
… determine the effectiveness of this project, few testings have been conducted. Finally, the control is assessed through hardware test experiment. The results of simulation and hardware experiment showed that this control method is successful in controlling MPPT using P&O for buck-boost converter …
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The Modified-Multiphase Boost Converter: Combined Inductors and Capacitors Topology
… This thesis covers the analysis, simulation, hardware implementation, and testing of the Modified-Multiphase Boost Converter as well as an equivalent Standard-Multiphase Boost Converter for comparison. Simulation and hardware test results exhibited a 9% input current ripple reduction with the …
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Reduction of Near-Field Grating Lobes in Sparse Acoustic Phased Arrays
… verify the efficacy of these configurations, a hardware test platform was constructed. The platform permits largely automated evaluation of the near-field character of arbitrary array configurations. Using the test platform, several of the arrangements were constructed and evaluated. The results …
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Impact Analysis and Design Development for Air-Dropped Antarctic Seismo-Geodetic Ice Penetrator
… is compared to previously envisioned and tested penetrator systems. Impact modeling of SGIP into glacial firn is detailed, with a focus on fast simulation run-times for design exploration. Designs of snow spikes and a rigid antenna mast are detailed, analyzed and tested. Results from a …
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Arm systems semantics
… on architecture specifications to decouple hardware and software development. Historically these have been prose documents, with all the problems that entails, but research over the last ten years has developed rigorous and executable-as-test-oracle specifications of mainstream architecture …
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Autonomous Source Localization
… good paths for vehicles to take. An initial hardware test conducted at Savannah River National Laboratory served as a proof of concept and demonstrated that the algorithm successfully locates a radioactive source in the environment, and moves the vehicle to that location. This approach also …
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Experimental Verification and Integration of a Next Generation Smart Power Management System
… SGPN has been designed, built, and is undergoing testing. Hardware test results obtained are consistent with the design goals set and indicate that the SGPN is a viable system with recommended changes and future work</p>
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Industrial automation and control in hazardous nuclear environments
… sharps, and fines. This effort examines the hardware and software framework developed to support the use of a Port Deployed Manipulator (PDM) for a contact task. This research effort uses a 7 Degree-of-Freedom (DOF) PDM and a micropunch to reduce hemispherical pit surrogates. Formulation of …
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Fast methods for scheduling with applications to real-time systems and large-scale, robotic manufacturing of aerospace structures
… and has been demonstrated in a multi-robot hardware test bed. My primary technical contributions are fast, near-optimal, real-time systems methods for scheduling and testing the schedulability of task sets. I also present a pilot study that investigates what level of control the Tercio …
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Directional UAV swarming: a network perspective
… data forwarding. In Chapter 5, we propose a hardware test-bed for wireless mesh networks with multi-beam smart antennas with USRP-RIO. We tested the directionality of the antenna, implemented a full-duplex transmission system and a relay system. Furthermore, CPT and CPR which are the two …
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High Quality Test Generation at the Register Transfer Level
… size has also lead to significant growth in testing effort required to verify the design. In order to cope with the required effort, the testing problem must be approached from several different design levels. In particular, exploiting the Register Transfer Level for test generation allows …
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Biologically Inspired Cognitive Radio Engine Model Utilizing Distributed Genetic Algorithms for Secure and Robust Wireless Communications and Networking
… the BioCR. Results from the implementation and testing of the model in a hardware test bed and simulation test bench are presented, with a focus on rapidly deployable disaster communications. Research contributions include developing a biologically inspired model of cognition in a radio …
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An Empirical Comparison of Reuse in Embedded and Nonembedded Systems
… used, with embedded systems more likely to reuse hardware, test products, and test clusters. Nearly all the projects reported using code, but the questionnaire showed that the reuse of code brought mixed results. One of the differences expressed by the respondents to the questionnaire was the …