Design of millimetre-wave input-reflectionless amplifiers in 45nm CMOS-SOI Technology

In this thesis, a proposed method to minimize the impacts of out-of-band RF blocks using a novel circuit design technique is proposed for millimeter-wave amplifiers. Using this technique for amplifier design allows it to attain an input-reflectionless behavior at not only the passband but also the stopband. For proof-of-concept, three input-reflectionless amplifiers are designed and implemented using 45-nm silicon-on-insulator (SOI) CMOS technology. The first design is a single-stage narrowband amplifier. The DC-power consumption of the designed amplifier is 5.3 mW. It has a peak gain of 5.3 dB at 31 GHz. The input-power-matching levels of the designed amplifier are better than 10 dB from DC to 50 GHz. The second design is a two-stage amplifier, is a two-stage narrowband amplifier which builds upon the design technique and extend it to multi-stage input-reflectionless amplifiers. The DC-power consumption of the designed amplifier is 10.35 mW. It has a peak gain of 18.5 dB at 35 GHz. The input-power-matching level is smaller than -10 dB from DC to 50 GHz. Finally, the design technique is also applied to a wideband amplifier design. The 3-dB bandwidth of 21 - 42 GHz is achieved, with a peak gain of 14 dB.

Author dc:creator

• Ang, Jim Darrell

Statement dc:rights

• info:eu-repo/semantics/embargoedAccess
• The author owns the copyright in this thesis including all reproduction and reuse rights for the work. The work may not be altered without the permission of the copyright owner. Attribution is essential when quoting or paraphrasing from this thesis.
• © 2025 Jim Darrell Ang
• au.edu.uts.lib/nph

Language dc:language.iso

en_US

Handle dc:identifier.uri

http://hdl.handle.net/10453/190600

OAI identifier oai:identifier

oai:opus.lib.uts.edu.au:10453/190600