University of Tennessee at Chattanooga
Educational applications of partial reconfiguration of FPGAS
Abstract
dc:description.abstractThe use of partial reconfiguration (PR) in reconfigurable systems such as Field Programming Gate Arrays (FPGAs) has gained a lot of attention during the past ten years. Recently, Xilinx has released the first commercially available PR implementation for its FPGAs. However, there is a lack of educational tools for PR instruction. In addition, the design and implantation of PR on FPGAs can be beneficial compared with the current communications tools within academia. This thesis presents the design and simulation of several basic modulation schemes within Simulink and System Generator for educational applications in communications classes. In addition, the implementation process of creating and testing additional partial bitstreams will take a few minutes rather than a few hours, which make this reconfigurable system a suitable system for educational applications. Furthermore, each modulation scheme can be implemented without any use of Hardware Description Language (HDL), embedded, and software development design. After implementing these models on an FPGA the results of these implementations are analyzed and compared with the simulation results. The results demonstrate the proper implementation of these PR designs on FPGAs.
Degree
thesis:*- Grantor dc:publisher
- University of Tennessee at Chattanooga
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Sarfaraz, Maysam
- Contributors dc:contributor
-
- Craven, Stephen D.
- Eltom, Ahmed; Yaqub, Raziq
- College of Engineering and Computer Science
Subjects
dc:subject × 1Rights
dc:rights- Language dc:language
- English, eng
Identifiers
dc:identifier.*- Repository record dc:identifier
- https://scholar.utc.edu/theses/53
- OAI identifier oai:identifier
- oai:scholar.utc.edu:theses-1052