{"id":{"repo_id":"utc","oai_identifier":"oai:scholar.utc.edu:theses-1052"},"canonical_url":"https://search.dev.ndltd.org/etd/utc/oai:scholar.utc.edu:theses-1052","repository":{"repo_id":"utc","name":"University of Tennessee - Chattanooga","base_url":"https://scholar.utc.edu/do/oai/"},"display":{"title":"Educational applications of partial reconfiguration of FPGAS","abstract":"The use of partial reconfiguration (PR) in reconfigurable systems such as Field Programming Gate Arrays (FPGAs) has gained a lot of attention during the past ten years. Recently, Xilinx has released the first commercially available PR implementation for its FPGAs. However, there is a lack of educational tools for PR instruction. In addition, the design and implantation of PR on FPGAs can be beneficial compared with the current communications tools within academia. This thesis presents the design and simulation of several basic modulation schemes within Simulink and System Generator for educational applications in communications classes. In addition, the implementation process of creating and testing additional partial bitstreams will take a few minutes rather than a few hours, which make this reconfigurable system a suitable system for educational applications. Furthermore, each modulation scheme can be implemented without any use of Hardware Description Language (HDL), embedded, and software development design. After implementing these models on an FPGA the results of these implementations are analyzed and compared with the simulation results. The results demonstrate the proper implementation of these PR designs on FPGAs.","abstract_html":"The use of partial reconfiguration (PR) in reconfigurable systems such as Field Programming Gate Arrays (FPGAs) has gained a lot of attention during the past ten years. Recently, Xilinx has released the first commercially available PR implementation for its FPGAs. However, there is a lack of educational tools for PR instruction. In addition, the design and implantation of PR on FPGAs can be beneficial compared with the current communications tools within academia. This thesis presents the design and simulation of several basic modulation schemes within Simulink and System Generator for educational applications in communications classes. In addition, the implementation process of creating and testing additional partial bitstreams will take a few minutes rather than a few hours, which make this reconfigurable system a suitable system for educational applications. Furthermore, each modulation scheme can be implemented without any use of Hardware Description Language (HDL), embedded, and software development design. After implementing these models on an FPGA the results of these implementations are analyzed and compared with the simulation results. The results demonstrate the proper implementation of these PR designs on FPGAs.","abstract_has_math":false,"creators":["Sarfaraz, Maysam"],"institution":"University of Tennessee at Chattanooga","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":["Craven, Stephen D.","Eltom, Ahmed; Yaqub, Raziq","College of Engineering and Computer Science"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":null,"date_issued":"","date_published":null,"updated_at":"2026-07-24T05:46:02Z","subjects":["Adaptive computing systems"],"languages":["English","eng"],"rights":[],"rights_urls":["https://rightsstatements.org/page/InC/1.0/?language=en"],"identifier_entries":[]},"links":{"outbound_url":"https://scholar.utc.edu/theses/53","outbound_label":"Repository record","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Craven, Stephen D.","Eltom, Ahmed; Yaqub, Raziq","College of Engineering and Computer Science"]},{"key":"dc:creator","label":"Author","values":["Sarfaraz, Maysam"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2011-05-01T07:00:00Z"]},{"key":"dc:publisher","label":"Institution","values":["University of Tennessee at Chattanooga","Chattanooga (Tenn.)"]},{"key":"dc:relation","label":"Dc Relation","values":["Masters Theses and Doctoral Dissertations"]},{"key":"dc:type","label":"Dc Type","values":["Masters theses","Text"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Adaptive computing systems"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["English","eng"]},{"key":"dc:rights","label":"Dc Rights","values":["https://rightsstatements.org/page/InC/1.0/?language=en"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://scholar.utc.edu/theses/53"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Dept. of Electrical Engineering","M. S.; A thesis submitted to the faculty of the University of Tennessee at Chattanooga in partial fulfillment of the requirements of the degree of Master of Science."]},{"key":"dc:description.abstract","label":"Abstract","values":["The use of partial reconfiguration (PR) in reconfigurable systems such as Field Programming Gate Arrays (FPGAs) has gained a lot of attention during the past ten years. Recently, Xilinx has released the first commercially available PR implementation for its FPGAs. However, there is a lack of educational tools for PR instruction. In addition, the design and implantation of PR on FPGAs can be beneficial compared with the current communications tools within academia. This thesis presents the design and simulation of several basic modulation schemes within Simulink and System Generator for educational applications in communications classes. In addition, the implementation process of creating and testing additional partial bitstreams will take a few minutes rather than a few hours, which make this reconfigurable system a suitable system for educational applications. Furthermore, each modulation scheme can be implemented without any use of Hardware Description Language (HDL), embedded, and software development design. After implementing these models on an FPGA the results of these implementations are analyzed and compared with the simulation results. The results demonstrate the proper implementation of these PR designs on FPGAs."]},{"key":"dc:title","label":"Title","values":["Educational applications of partial reconfiguration of FPGAS"]}]}],"canonical_facts":{"dc:contributor":["Craven, Stephen D.","Eltom, Ahmed; Yaqub, Raziq","College of Engineering and Computer Science"],"dc:creator":["Sarfaraz, Maysam"],"dc:date":["2011-05-01T07:00:00Z"],"dc:description":["Dept. of Electrical Engineering","M. S.; A thesis submitted to the faculty of the University of Tennessee at Chattanooga in partial fulfillment of the requirements of the degree of Master of Science."],"dc:description.abstract":["The use of partial reconfiguration (PR) in reconfigurable systems such as Field Programming Gate Arrays (FPGAs) has gained a lot of attention during the past ten years. Recently, Xilinx has released the first commercially available PR implementation for its FPGAs. However, there is a lack of educational tools for PR instruction. In addition, the design and implantation of PR on FPGAs can be beneficial compared with the current communications tools within academia. This thesis presents the design and simulation of several basic modulation schemes within Simulink and System Generator for educational applications in communications classes. In addition, the implementation process of creating and testing additional partial bitstreams will take a few minutes rather than a few hours, which make this reconfigurable system a suitable system for educational applications. Furthermore, each modulation scheme can be implemented without any use of Hardware Description Language (HDL), embedded, and software development design. After implementing these models on an FPGA the results of these implementations are analyzed and compared with the simulation results. The results demonstrate the proper implementation of these PR designs on FPGAs."],"dc:identifier":["https://scholar.utc.edu/theses/53"],"dc:language":["English","eng"],"dc:publisher":["University of Tennessee at Chattanooga","Chattanooga (Tenn.)"],"dc:relation":["Masters Theses and Doctoral Dissertations"],"dc:rights":["https://rightsstatements.org/page/InC/1.0/?language=en"],"dc:subject":["Adaptive computing systems"],"dc:title":["Educational applications of partial reconfiguration of FPGAS"],"dc:type":["Masters theses","Text"]},"updated_at":"2026-07-24T05:46:02Z"}