Implementation of Directional Median Filtering using Field Programmable Gate Arrays

<p>Median filtering is a non-linear filtering technique which is effective in removing impulsive noise from data. In this thesis, directional median filtering has been implemented using cumulative histogram of samples in several directions. Different methods to implement directional median filtering have been proposed. The filtered images are smoothed along the direction of the filtering window. All implementations aimed to generate outputs in the least amount of time, while reducing the resource utilization on hardware. The implementation methods were designed for Xilinx Virtex 5 FPGA devices but were also attempted on Spartan 3E. The proposed methods used less than 30% of the resources on Virtex 5 FPGA but the resource utilization on Spartan 3E exceeded the number of available resources. After an initial delay, methods 1 and 2 generate a new output for every 5 clock cycles while method 3 generates an output for every 1.5 clock cycles.</p>

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis-Restricted

Discipline thesis:degree_discipline

Electrical Engineering

Year

2010

Author dc:creator

• Gundam, Madhuri

Contributors dc:contributor

• Charalampidis, Dimitrios
• Jilkov, Vesselin
• Azzam, Rasheed

• Histogram
• Median
• Sorting Network
• Directional Median Filtering
• FPGA
• CLB
• LUT
• Spartan 3E
• Virtex5

Repository record dc:identifier

https://scholarworks.uno.edu/td/111

OAI identifier oai:identifier

oai:scholarworks.uno.edu:td-1110