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University of New Mexico

Numerical Modeling Analysis of Wafer Warpage and Carrier Mobility Change due to Tapered Through-Silicon-Via Geometry

Abstract

dc:description.abstract

Three-dimensional integration is a solution that vertically stacks multiple layers of silicon chips by Through-Silicon-Vias (TSVs) to enhance the performance of microelectronic devices. The tapered TSV profile can help to overcome the technical difficulties. However, an easily overlooked issue is that tapered TSV can cause wafer warpage during the fabrication processes. Wafer warpage can cause chip misalignment and impose additional deformation. In an effort to investigate the TSV geometric effect, a large number of finite element analysis (FEA) simulations were performed to quantify the thermal stress distribution and the thermally induced curvature. It was found that the tapered geometry alone can induce significant wafer bending, which has not been reported by other researchers. The effect of taper angle, TSV radius, TSV pitch, and wafer thickness were quantitatively studied. In addition, the incorporations of anisotropic silicon property and intermediate layers between the copper TSV and silicon into the numerical models were assessed. Thermally induced stress concentration around copper TSV near the wafer surface can lead to degradation of the device performance by affecting the carrier mobility in transistors. This piezoresistivity effect can cause serious reliability concerns. The size of keep-out zone (KOZ), which is identified as a threshold of 5% carrier mobility change, was also quantified for various transistor types in different channel directions.

Degree

thesis:*
Name thesis:degree_name
Mechanical Engineering
Level thesis:degree_level
Masters
Discipline thesis:degree_discipline
Mechanical Engineering
Year
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Dou, Jingjing
Contributors dc:contributor
  • Shen, Yu-Lin
  • Razani, Arsalan
  • Sorrentino, Francesco

Subjects

dc:subject × 3

Rights

Language dc:language
English

Identifiers

dc:identifier.*
OAI identifier oai:identifier
oai:digitalrepository.unm.edu:me_etds-1086

Chain of custody

source
Harvested from
University of New Mexico
Base URL
digitalrepository.unm.edu/do/oai/
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

Dou, Jingjing. Numerical Modeling Analysis of Wafer Warpage and Carrier Mobility Change due to Tapered Through-Silicon-Via Geometry. Masters thesis, 2015. http://hdl.handle.net/1928/25737