Time-based low dropout regulator

The low dropout regulator (LDO) is an essential building block for modern integrated circuits. Traditional analog design faces formidable challenges as technology scales down, such as lower supply voltage and channel length modulation. Digital LDOs do not have the problems that analog LDOs have, but they usually have worse performance metrics. Therefore, a time-based LDO is proposed to combine the merits of both analog and digital together. In the end, the LDO achieves 0.6-1 V supply voltage range and 0.5-0.9 V output voltage range. The maximum output current is 50 mA and the worst case transient time is 1.58 μs under 0.6 V supply voltage. The maximum current efficiency is 99.98%.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2016

Author dc:creator

• Wang, Danyang

Contributors dc:contributor

• Hanumolu, Pavan K.

• Low dropout regulator
• Analog

Statement dc:rights

• Copyright 2016 Danyang Wang

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/90671

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/90671