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University of Illinois at Urbana-Champaign
The Retiming and Routing of VLSI Circuits
Abstract
dc:description"Multi-layer technologies present additional challenges to the routing of the nets because the layer assignment can have a large impact on the net delays. Traditional approaches cause the first few nets to monopolize the ""good"" layers. Therefore, they perform poorly under the metric of minimizing the maximum net delay. We propose the use of dynamic area quotas to remedy this problem. Our approach is independent of the routing model and the router used, and works very well in practice."
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Computer Science
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2015
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Saxena, Prashant
- Contributors dc:contributor
-
- Liu, C.L.
Subjects
dc:subject × 1Rights
- Language dc:language
- eng
Identifiers
dc:identifier.*- Identifier
- (MiAaPQ)AAI9912369
- OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/81934