Superthreading: Integrating Compilation Technology and Processor Architecture for Cost-Effective Concurrent Multithreading

In this thesis we also present the compiler techniques for superthreaded processors. Many existing compiler techniques used in traditional parallelizing compilers for multiprocessors as well as some specific compiler techniques for superthreaded processors are needed for generating superthreaded codes and enhancing parallelism between threads. We evaluate the performance of the superthreaded architecture with a trace-driven, cycle-by-cycle superthreaded processor simulator by using codes transformed by hand and codes generated by our superthreading compiler prototype. The simulation results show that a superthreaded processor can achieve good performance by exploiting both thread-level and instruction-level parallelism in programs.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

1998

Author dc:creator

• Tsai, Jenn-Yuan

Contributors dc:contributor

• Yew, Pen-Chung

• Engineering, Electronics and Electrical

Language dc:language

eng

Identifier

(MiAaPQ)AAI9904609

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/81920