Techniques to Address Unreliability and Variability of Computing Systems

We show that FGBB should be applied in an architecture-aware manner, following the shapes of architectural modules. The reason is that architectural functionality affects the BB needed through temperature and type of critical path. To prove this idea, we develop a model of threshold voltage variation and apply it to simulated batches of chips. We show that architecture-aware FGBB enables 35% of the chips to work at the highest frequency, compared to 18% with conventional FGBB, potentially increasing each chip's value by 50%. It also reduces the leakage of the chips by 40%, compared to 25% with conventional FGBB.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Nakano, Jun

Contributors dc:contributor

• Torrellas, Josep

• Computer Science

Language dc:language

eng

Identifier

(MiAaPQ)AAI3223677

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/81724