Managing Processor Adaptation for Energy Reduction and Temperature Control

The second part of the thesis discusses how to further improve the algorithm for energy efficiency. We observe that applications change their demands on the hardware as they execute. This suggests that certain hardware adaptations can be made to save energy at little performance cost. In the context of a general purpose system with multiple LPTs, we address the twin problems of when to adapt, and what LPT to use to adapt. We demonstrate that rather than adapting the processor at time intervals, it is better to do it at the grain of subroutines: the reaction of a subroutine to system adaptation is usually highly predictable, and the best adaptation for a subroutine can be easily remembered and reused later. Using this insight, we design architectural support for an adaptive processor to decide what specific LPTs to activate and when to activate them. Targeting different environments, we propose a framework of different schemes to exploit an adaptive processor, where these decisions are made off- or on-line. Overall, the schemes perform better than an approach based on fixed-time intervals similar to the original DEETM: in a system with three LPTs, energy savings increase by 40--63% with less performance degradation.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Huang, Michael Cliff

Contributors dc:contributor

• Torrellas, Josep

• Computer Science

Language dc:language

eng

Identifier

(MiAaPQ)AAI3070329

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/81606