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University of Illinois at Urbana-Champaign

Parallel Algorithms for Sequential Circuit Fault Simulation and Test Generation

Abstract

dc:description

All implementations were done using the MPI communication library and are therefore portable to many parallel platforms. All algorithms provide excellent performance in terms of speedup and quality on both shared-memory and distributed-memory parallel platforms.

Degree

thesis:*
Name thesis:degree_name
Ph.D.
Level thesis:degree_level
Dissertation
Discipline thesis:degree_discipline
Electrical Engineering
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Krishnaswamy, Dilip
Contributors dc:contributor
  • Banerjee, Prithviraj
  • Janak Patel

Subjects

dc:subject × 1

Rights

Language dc:language
eng

Identifiers

dc:identifier.*
Identifier
(MiAaPQ)AAI9812660
OAI identifier oai:identifier
oai:www.ideals.illinois.edu:2142/81212

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Krishnaswamy, Dilip. Parallel Algorithms for Sequential Circuit Fault Simulation and Test Generation. Dissertation thesis, University of Illinois at Urbana-Champaign, 2015. http://hdl.handle.net/2142/81212