Fast Algorithms for the Design and Analysis of Large Power Grids

The design of power grid becomes even more difficult due to the bottleneck of simulation. We propose algorithms to determine the placement of power pads that minimize not only the worst voltage drop but also the voltage deviation across the power grid. Our algorithm uses simulated annealing to minimize the total cost of voltage drops. The key enabler for efficient optimization is a fast localized node-based iterative method to compute the voltages after each movement of pads. Experimental results show that our algorithm demonstrates good runtime characteristics for power grids with large numbers of pad candidates in multimillion-size circuits.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical and Computer Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Zhong, Yu

Contributors dc:contributor

• Wong, Martin D.F.

• Engineering, Electronics and Electrical

Language dc:language

eng

Identifier

(MiAaPQ)AAI3314956

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/81086