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University of Illinois at Urbana-Champaign

Cost Effective Soft Error Mitigation in Microprocessors

Abstract

dc:description

Finally, in this work, pains were taken to include as much detail as possible in the processor model and analysis methodology. We conclude with an examination of how making various approximations in the model and analysis methodology affect the experimental results and conclusions of this and other processor reliability studies.

Degree

thesis:*
Name thesis:degree_name
Ph.D.
Level thesis:degree_level
Dissertation
Discipline thesis:degree_discipline
Electrical and Computer Engineering
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Wang, Nicholas J.
Contributors dc:contributor
  • Patel, Sanjay J.

Subjects

dc:subject × 1

Rights

Language dc:language
eng

Identifiers

dc:identifier.*
Identifier
(MiAaPQ)AAI3290421
OAI identifier oai:identifier
oai:www.ideals.illinois.edu:2142/81048

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Wang, Nicholas J.. Cost Effective Soft Error Mitigation in Microprocessors. Dissertation thesis, University of Illinois at Urbana-Champaign, 2015. http://hdl.handle.net/2142/81048