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University of Illinois at Urbana-Champaign

SOI Circuit Design Styles and High-Level Circuit Modeling Techniques

Abstract

dc:description

Cell-based noise analysis tools. In advanced SOI technologies, the input noise may propagate, with little attenuation, through several or many gates. Therefore, accurately modeling noise propagation (from a cell's inputs to its outputs) is of significant importance for cell-based noise analysis tools. We propose and implement two new macromodeling techniques for purposes of building a noise-rule library. Our models capture the cell's output response due to noise at its input. Thus, one may accurately predict the propagated noise, perform failure/sensitivity (stability) analysis, or even hierarchically build the noise abstracts by invoking those high-level macromodels.

Degree

thesis:*
Name thesis:degree_name
Ph.D.
Level thesis:degree_level
Dissertation
Discipline thesis:degree_discipline
Electrical Engineering
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Kanj, Rouwaida
Contributors dc:contributor
  • Rosenbaum, Elyse

Subjects

dc:subject × 1

Rights

Language dc:language
eng

Identifiers

dc:identifier.*
Identifier
(MiAaPQ)AAI3153228
OAI identifier oai:identifier
oai:www.ideals.illinois.edu:2142/80867

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Kanj, Rouwaida. SOI Circuit Design Styles and High-Level Circuit Modeling Techniques. Dissertation thesis, University of Illinois at Urbana-Champaign, 2015. http://hdl.handle.net/2142/80867