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University of Illinois at Urbana-Champaign
Low-Power CMOS Circuits for High-Performance Deep Submicron System on a Chip
Abstract
dc:descriptionDelay-locked loop (DLL)-based clock multipliers have several inherent advantages over conventional PLL-based clock multipliers. We propose a phase detector with reset circuitry and a new frequency multiplier to overcome the limited locking range and frequency multiplication problem of conventional DLL-based system.
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Electrical Engineering
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2015
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Kim, Chulwoo
- Contributors dc:contributor
-
- Sung-Mo Kang
Subjects
dc:subject × 1Rights
- Language dc:language
- eng
Identifiers
dc:identifier.*- Identifier
- (MiAaPQ)AAI3070503
- OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/80811