Towards high performance graphene nanoelectronics: materials, contacts and interfaces

The growth and widespread use of consumer electronics over the last decade has been driven by the evolution and diversification of nanotechnology. In order to continue this growth and implement newer functionalities, such as energy efficiency, speed, flexibility and portability, the scientific community has started investigating an emerging class of materials: two-dimensional nanomaterials. More specifically, graphene has been at the forefront of this development for a wide range of macro and nanoelectronic applications due to a combination of unique electrical and thermal properties and an atomically thin lattice (~3.4 Å). Some of these applications include flexible transparent electrodes, heat spreaders and fast analog devices and integrated circuits. These large-scale implementations require the ability to inexpensively fabricate wafer-scale pristine graphene sheets with optimized, reliable, and reproducible electrical characteristics. However, challenges such as unstable graphene interfaces, low material quality, high contact resistance and large variability limit graphene performance below theoretical predictions. In this dissertation work, we investigate these challenges from metrology and technology development perspectives. First we study the graphene-dielectric insulator interface by using a nanosecond-range pulsed characterization technique. Due to gate dielectric imperfections, the drain current degrades, suggesting the presence of charge trapping mechanisms. These charge trapping effects produce threshold voltage instability (hysteresis) in the current-voltage characteristics. We find that with nanosecond-range pulsed operation, hysteresis can be suppressed and reliable intrinsic behavior restored. Additionally, we briefly study the charge trapping contributions of high-field effects. Next, after having examined intrinsic device operation, we shift focus in order to improve extrinsic device performance. We investigate large-scale CVD-grown polymer-transferred graphene quality issues and characterize device-to-device variability. We optimize a polycarbonate based polymer scaffold, used for mechanical support and protection during graphene transfer, and a vacuum annealing process in order to remove surface residues without inducing damage. Both of these implementations help improve important device parameters such as contact resistance, mobility, and device-to-device variability. Lastly, we study the interactions at the metal-graphene interface in the presence of increased p-type doping. We use known p-type dopants in solution (hydrochloric and nitric acid) to induce Fermi level shifts in the graphene-under-metal via surface charge transfer. With this technique, we decrease sheet resistance, increase hole carrier concentration and enhance the metal-graphene electronic coupling. Ultimately these factors contribute to a reduction of contact resistance and its variability, resulting in more reliable and less varying electrical characteristics. Overall, in this dissertation we have shown experimental work towards the development of higher performing graphene based nanoelectronics. This work contributes to the existing knowledge and techniques and brings graphene nanoelectronic development a step closer to industrial commercialization.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Carrion, Enrique

Contributors dc:contributor

• Pop, Eric
• Li, Xiuling
• Lyding, Joseph W.
• Shanbhag, Naresh

• graphene
• Field Effect Transistor (FET)
• nanosecond
• pulsed measurement
• doping
• contact resistance
• variability
• polymer transfer

Statement dc:rights

• Copyright 2014 Enrique Carrion

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/72972

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/72972