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University of Illinois at Urbana-Champaign

Performance Evaluation of Memory Systems for High-Speed Computers

Abstract

dc:description

High speed computer systems pose two significant problems for memory system designers. How to design memory systems to meet the memory access performance required by the processors and how to evaluate proposed memory designs. This thesis addresses these two issues.

Degree

thesis:*
Name thesis:degree_name
Ph.D.
Level thesis:degree_level
Dissertation
Discipline thesis:degree_discipline
Computer Science
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2014

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Fu, John Wai Cheong
Contributors dc:contributor
  • Patel, Janak H.

Subjects

dc:subject × 1

Identifiers

dc:identifier.*
Identifier
(UMI)AAI9305528
OAI identifier oai:identifier
oai:www.ideals.illinois.edu:2142/72064

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Fu, John Wai Cheong. Performance Evaluation of Memory Systems for High-Speed Computers. Dissertation thesis, University of Illinois at Urbana-Champaign, 2014. http://hdl.handle.net/2142/72064