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University of Illinois at Urbana-Champaign
Periodic Application of Concurrent Error Detection in Processor Array Architectures
Abstract
dc:descriptionProcessor arrays can provide an attractive architecture for some applications. Featuring modularity, regular interconnection and high parallelism, such arrays are well-suited for VLSI/WSI implementations, and applications with high computational requirements, such as real-time signal processing.
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Electrical Engineering
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2014
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Chen, Paul Peichuan
- Contributors dc:contributor
-
- Fuchs, W. Kent
Subjects
dc:subject × 1Identifiers
dc:identifier.*- Identifier
- (UMI)AAI9328996
- OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/71998