Abstract
dc:descriptionThis thesis considers several problems arising during VLSI layout and presents new techniques for solving them efficiently.
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Computer Science
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2014
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Tollis, Ioannis Georgios
- Contributors dc:contributor
-
- Preparata, Franco P.
Subjects
dc:subject × 2Identifiers
dc:identifier.*- Identifier
- (UMI)AAI8815431
- OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/69592