Design of Minimal Programmable Logic Arrays

The switching function minimization is very important for optimal and reliable PLA design. A number of different minimization procedures have appeared. However, until recently, the application of these minimization procedures has been limited to functions of a few variables. For the automated design of PLA's, we need computationally efficient procedures that can minimize functions of a large number of variables. For this type of function, the commonly used procedures cannot be applied either because they take too much computation time or because they require too much memory space. Part I of this thesis proposes a new minimization procedure requiring less computation time and less memory space. Part I also proposes the heuristic procedures for some functions which abolute minimization procedures cannot minimize within reasonable amount of time and memory space.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2014

Author dc:creator

• Hong, Sung Je

• Computer Science

Identifier

(UMI)AAI8409954

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/69525