Reduction in Main Memory Traffic Through the Efficient Use of Local Memory

Memory referencing behavior is analyzed by studying traces for the purpose of developing new local memory structures and management techniques that reduce the traffic to main memory. A novel trace processing technique called flattening reduces the dependence of the results on the underlying compiler and architecture on which the trace was generated and partitions each memory location into its constituent single assignment values. The referencing pattern of each value in the resulting trace is described through the distribution of statistics such as interreference time, and lifetime. The referencing patterns of the entire trace are described via histograms showing the distributions of the statistics for the individual values. The results of this analysis indicate the use of a program-controlled cache to reduce the traffic from the cache to main memory. By using program control, future knowledge which is available to the compiler can be imparted to the cache, allowing the removal of dead values and early replacement of values with long interreference times. Furthermore, the histogramming techniques used to study memory referencing behavior can be used to analyze cache behavior and paint a detailed picture of how the cache behaves as configuration parameters such as size, associativity, and the use of program control are varied. The results of this study indicate that the use of program control can enhance system performance by improving cache utilization.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2014

Author dc:creator

• McNiven, Geoffrey David

Contributors dc:contributor

• Davidson, Edward S.

• Engineering, Electronics and Electrical
• Computer Science

Identifier

(UMI)AAI8823198

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/69399