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University of Illinois at Urbana-Champaign
Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits
Abstract
dc:descriptionThe increased complexity of the very large scale integrated circuits (VLSI) has greatly impacted the field of computer-aided design (CAD). One of the problems brought about is the interconnection problem.
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Electrical Engineering
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2014
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Yuan, Chen-Ping
Subjects
dc:subject × 1Identifiers
dc:identifier.*- Identifier
- (UMI)AAI8410077
- OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/69278