Architecture for Multiple Instruction Stream Lsi Processors

Kaminsky, William Joseph, Jr.

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University of Illinois at Urbana-Champaign

Architecture for Multiple Instruction Stream Lsi Processors

dc:creator Kaminsky, William Joseph, Jr.

thesis:degree_name Ph.D.

dc:date2014

Abstract

dc:description

Made available in DSpace on 2014-12-12T20:54:42Z (GMT). No. of bitstreams: 1 7804040.pdf: 4067975 bytes, checksum: 2910fb3134572dc10cd3a71fc29715fd (MD5) Previous issue date: 1977

Degree

thesis:*

Name thesis:degree_name: Ph.D.
Level thesis:degree_level: Dissertation
Discipline thesis:degree_discipline: Electrical Engineering
Grantor: University of Illinois at Urbana-Champaign
Year dc:date: 2014

Author and committee

dc:creator, dc:contributor.*

Author dc:creator: Kaminsky, William Joseph, Jr.

Subjects

dc:subject × 1

Computer Science

Rights

Language dc:language: eng

Identifiers

dc:identifier.*

Identifier: (UMI)AAI7804040
OAI identifier oai:identifier: oai:www.ideals.illinois.edu:2142/66162

Chain of custody

source

Harvested from: University of Illinois - Urbana-Champaign
Base URL: www.ideals.illinois.edu/oai-pmh
Last updated: 2026-07-22
Source record: OAI-PMH GetRecord

related terms

citation

Kaminsky, William Joseph, Jr.. Architecture for Multiple Instruction Stream Lsi Processors. Dissertation thesis, University of Illinois at Urbana-Champaign, 2014. http://hdl.handle.net/2142/66162

Architecture for Multiple Instruction Stream Lsi Processors

Abstract

Degree

Author and committee

Subjects

Rights

Identifiers

Chain of custody

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