Application of the latency insertion method (LIM) to the analysis of large circuit interconnect networks

The focus of this research is to explore the applications of the finite difference formulation based on the latency insertion method (LIM) to the analysis of circuit interconnects. Special attention is devoted to addressing the issues that arise in very large networks such as on-chip signal and power distribution networks. We demonstrate that the LIM has the power and flexibility to handle various types of analysis required at different stages of circuit design. The LIM is particularly suitable for simulations of very large scale linear networks and can significantly outperform conventional circuit solvers (such as SPICE).

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2012

Author dc:creator

• Klokotov, Dmitri

Contributors dc:contributor

• Schutt-Ainé, José E.
• Bernhard, Jennifer T.
• Rosenbaum, Elyse
• Wong, Martin D.F.

• circuit simulation
• latency insertion
• power integrity
• power distribution network analysis
• electrothermal analysis
• IR drop
• Latency insertion method (LIM)

Statement dc:rights

• Copyright 2011 Dmitri Klokotov

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/29639

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/29639