The design and implementation of a workbench for application specific message-passing parallel reconfigurable architectures

This thesis develops a message-passing model for the design, simulation and evaluation of parallel reconfigurable architectures. A designer's workbench, OODRA (Object-Oriented Design of Reliable/Reconfigurable Architecture), has been implemented to realize the proposed message-passing model, and it provides a window-based, menu driven, graphics interactive environment for designing application-specific parallel architectures as well as the development of reconfiguration algorithms, the reliability analysis, and architectural level yield analysis. Applications of the workbench include the design and evaluation of an adaptive digital beamforming architecture, and the fast Fourier Transform algorithm running on a simulated Hypercube architecture.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Engineering, Electronics and Electrical

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Hwang, Kou-Rey David

• Engineering, Electronics and Electrical
• Computer Science

Statement dc:rights

• Copyright 1989 David Kou-Rey Hwang

Language dc:language

eng

Identifier

AAI8924851
(UMI)AAI8924851

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/23483