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University of Illinois at Urbana-Champaign
Memory disambiguation to facilitate instruction-level parallelism compilation
Abstract
dc:descriptionTo expose sufficient instruction-level parallelism (ILP) to make effective use of wide-issue superscalar and VLIW processor resources, the compiler must perform aggressive low-level code optimization and scheduling. However, ambiguous memory dependences can significantly limit the compiler's ability to expose ILP. To overcome the problem of ambiguous memory dependences, optimizing compilers perform memory disambiguation.
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Electrical Engineering
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2011
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Gallagher, David Mark
- Contributors dc:contributor
-
- Hwu, Wen-Mei W.
Subjects
dc:subject × 1Rights
dc:rights- Statement dc:rights
-
- Copyright 1995 Gallagher, David Mark
- Language dc:language
- eng
Identifiers
dc:identifier.*- Identifier
-
AAI9624348
(UMI)AAI9624348 - OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/21790