Memory latency reduction via data prefetching and data forwarding in shared memory multiprocessors

This dissertation considers the use of data prefetching and an alternative mechanism, data forwarding, for reducing memory latency due to interprocessor communication in cache coherent, shared memory multiprocessors. The benefits of prefetching and forwarding are considered for large, numerical application codes with loop-level and vector parallelism. Data prefetching is applied to these applications using two different multiprocessor prefetching algorithms implemented within a parallelizing compiler. Data forwarding considers array references involved in communication-related accesses between successive parallel loops, rather than within a single loop nest. A hybrid prefetching and forwarding scheme and a compiler algorithm for data forwarding are also presented.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Poulsen, David Kristian

Contributors dc:contributor

• Yew, Pen-Chung

• Engineering, Electronics and Electrical
• Computer Science

Statement dc:rights

• Copyright 1994 Poulsen, David Kristian

Language dc:language

eng

Identifier

AAI9512515
(UMI)AAI9512515

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/21242