Use of architectural-level primitives in system-level diagnosis and speed up of test vector generation

Test generation is an important part of a circuit as the test vectors are used during the design, manufacture, system integration, and throughout the life-cycle of the circuit in order to detect the presence of defects. The very large scale integration (VLSI) test generation problem has been one of the most complex and time-consuming problems. This is a major bottleneck in the design cycle of the circuit. The problem is further complicated by rapid advances in VLSI technology, such as in CMOS, where the traditional stuck-at fault model is inadequate, and the increase in gate to pin ratio makes it difficult to access and observe the internal signals.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Kunda, Ramachandra P.

Contributors dc:contributor

• Patel, Janak H.

• Engineering, Electronics and Electrical

Statement dc:rights

• Copyright 1990 Kunda, Ramachandra P.

Language dc:language

eng

Identifier

AAI9114304
(UMI)AAI9114304

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/20795