Design automation for high performance complementary metal oxide-semiconductor VLSI circuits

This thesis addresses the circuit and layout issues of the Complementary Metal-Oxide-Semiconductor (CMOS) Very Large Scale Integrated (VLSI) circuit design. Dynamic CMOS circuits are implemented judiciously to increase the packing density and lower the power consumption. A design automation system, iCOACH, which dynamically generates cells as needed for each job according to their circumstantial situations such as fan-in, fan-out, and input signals is developed. A nonlinear objective function based on the technology power concept is formulated to determine the best circuit speed/area ratio. The reliability issues such as the charge sharing and the noise margin problems are embedded in the design constraints along with transistor size and timing specification constraints.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Chen, Hau-Yung

Contributors dc:contributor

• Kang, Sung Mo

• Engineering, Electronics and Electrical

Statement dc:rights

• Copyright 1989 Chen, Hau-Yung

Language dc:language

eng

Identifier

AAI8916226
(UMI)AAI8916226

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/20223