Hardware and software for functional and fine-grain parallelism

This thesis examines nonloop parallelism at both fine and coarse levels of granularity in numerical FORTRAN programs. Measurements of the extent of this functional parallelism in a number of FORTRAN codes are presented, as well as compiler and run-time algorithms designed to exploit it. Hardware and software embodiments of the dynamic scheduling algorithms are developed, along with the compiler optimizations necessary to make these practical.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Beckmann, Carl Josef

Contributors dc:contributor

• Polychronopoulos, Constantine D.

• Engineering, Electronics and Electrical
• Computer Science

Statement dc:rights

• Copyright 1993 Beckmann, Carl Josef

Language dc:language

eng

Identifier

AAI9411565
(UMI)AAI9411565

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/19412