A cross-stack, network-centric architectural design for next-generation datacenters

This thesis proposes a full-stack, cross-layer datacenter architecture based on in-network computing and near-memory processing paradigms. The proposed datacenter architecture is built atop two principles: (1) utilizing commodity, off-the-shelf hardware (i.e., processor, DRAM, and network devices) with minimal changes to their architecture, and (2) providing a standard interface to the programmers for using the novel hardware. More specifically, the proposed datacenter architecture enables a smart network adapter to collectively compress/decompress data exchange between distributed DNN training nodes and assist the operating system in performing aggressive processor power management. It also deploys specialized memory modules in the servers, capable of performing general-purpose computation and network connectivity. This thesis unlocks the potentials of hardware and operating system co-design in architecting application-transparent, near-data processing hardware for improving datacenter's performance, energy efficiency, and scalability. We evaluate the proposed datacenter architecture using a combination of full-system simulation, FPGA prototyping, and real-system experiments.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2020

Author dc:creator

• Alian, Mohammad

Contributors dc:contributor

• Kim, Nam Sung
• Hwu, Wen-mei
• Torrellas, Josep
• Kumar, Rakesh
• Snir, Marc

• datacenter architecture
• near-data processing
• near-memory processing
• in-network computing
• distributed simulation
• datacenter network architecture
• scale-out processing

Statement dc:rights

• Copyright 2020 Mohammad Alian

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/108449

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/108449