A soft coprocessor approach to the development of image and video processing applications on FPGAs

Developing FPGA-based applications is typically a slow and multi-skilled task. Tools to support application development have gradually become more high level. This thesis describes an approach which aims to raise further the level at which an application developer works while developing FPGA-based implementations of image and video processing applications. <br/><br/><br/>The starting concept is that of a soft coprocessor (SCP). A set of fundamental soft coprocessors is presented, aimed at implementing some of the key abstractions of Image Algebra. Each soft coprocessor processes an image or video stream, and can be parameterised by its specific functionality. To support interactive experimentation, the developer can edit the functionality and parameters without requiring re-synthesis in most cases. <br/><br/><br/>Our soft coprocessors are designed to enable easy chaining of SCPs, as defined by a Dataflow Graph (DFG). This reduces considerably the amount of data transfer between SCPs and the host processor. <br/><br/><br/>Although hardware optimisation is not a primary concern of this thesis, further contributions facilitate the development of more efficient and more specific versions of the more generic soft coprocessors, based on the concept of reusable coprocessor skeletons. <br/><br/><br/>To facilitate the creation of more algorithm-specific coprocessors which cannot be accommodated within the skeleton framework, a layered library of macros is developed, which enables a developer to create new coprocessors without requiring extensive hardware design knowledge. <br/><br/><br/>The thesis illustrates these novel concepts by presenting soft coprocessors for a range of common image processing algorithms, including a novel fast implementation of K-means Clustering for grey level images, GLCM feature extraction, and Histogram of oriented Gradients (HoG). <br/><br/>Finally, a prototype implementation of an integrated development environment, called SCoPeS, is presented. This enables a user to express an application as a text-based DFG of soft coprocessors, and automatically obtain and run an FPGA implementation. The ability to modify an application, even during execution, without requiring re-synthesis, is an important benefit given the experimental nature of image and video processing application development.

Name dc:type.qualificationname

Doctor of Philosophy

Level dc:type.qualificationlevel

Doctoral Thesis

Grantor dc:publisher.institution

Queen's University Belfast

Year dc:date.issued

2020

Author dc:creator

• Deng, Tiantai

Advisors dc:contributor.advisor

• McAllister, John
• Woods, Roger

• FPGA
• image processing
• High-level programming environment

Language dc:language

eng

Identifier

oai:pure.qub.ac.uk/portal:studenttheses/b3c3faa1-9816-4ec6-90d4-ac67a2b24f79

OAI identifier oai:identifier

oai:pure.qub.ac.uk/portal:studenttheses/b3c3faa1-9816-4ec6-90d4-ac67a2b24f79