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Massachusetts Institute of Technology

MOSFET channel engineering using strained Si and strained Ge grown on SiGe virtual substrates

Abstract

dc:description.abstract

As the economic and technological benefits of scaling in very-large-scale-integrated (VLSI) circuits decreases, the use of alternative channel materials such as germanium and strained silicon ([epsilon]-Si) is increasingly being considered as a method for improving the performance of MOSFETs. While [epsilon]-Si grown on relaxed Si[sub]l-x Ge[sub]x (i.e. single-channel heterostructure) is drawing closer to widespread commercialization, it is currently believed that almost all of the performance benefit in CMOS implementations will derive from the n-MOSFET. [epsilon]-Si p-MOSFETs demonstrate enhanced hole mobility, but the enhancement has been shown to degrade at high vertical fields for reasons that are still poorly understood. Dual-channel heterostructures, where a compressively-strained, Ge-rich layer is grown between the [epsilon]-Si cap and relaxed Si[sub]l-x Ge[sub]x virtual substrate have been shown to offer much larger hole mobility enhancements. One of the primary goals of this thesis is to understand and improve the performance of both single- and dual-channel heterostructure p-MOSFETs. The approach taken was to grow novel heterostructures and then fabricate MOSFETs using a short process flow. Cross-sectional TEM was constantly employed as a way to connect microstructure with mobility characteristics. In this way, constant and rapid feedback between device results and the design of improved layer structures was achieved, and the map of available mobility enhancements in Si[sub]l-x Ge[sub]x-based heterostructures was greatly extended. The step preceding all of the device work was to optimize the growth of highly strained layers via ultrahigh-vacuum chemical vapor deposition (UHVCVD). The deposition of highly strained layers in compression and tension creates problems that are not encountered in the growth of [epsilon]-Si on Si-rich Si[sub]1-x Ge[sub]x virtual substrates. Through a combination of low-temperature growth and a novel two-step passivation-and-heating sequence, a wide variety of fully planar single- and dual-channel heterostructures can now be achieved in UHVCVD.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Materials Science and Engineering.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2003

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Lee, Minjoo Lawrence, 1976-
Advisor dc:contributor.advisor
  • Eugene A. Fitzgerald.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/7966
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/7966

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Lee, Minjoo Lawrence, 1976-. MOSFET channel engineering using strained Si and strained Ge grown on SiGe virtual substrates. Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/7966