Low-power amplifier chopper stabilization for a digital-to-analog converter

Modern portable media devices demand low-power and low-noise performance from the internal digital-to-analog converter. CMOS design has allowed for oversampling sigma-delta modulation to achieve these goals. However, noise is typically limited by the kT/C noise in the switched capacitor filter following the digital modulation. These filters also require a large amount of on-chip capacitance. The goal of this project is to design a continuous-time output stage for a DAC. A continuous-time output requires much less capacitance than the SC filter. Chopper stabilization is applied to the amplifier to reduce the low-frequency noise. The challenge of this architecture is maintaining amplifier harmonic performance and transient performance. In simulations, chopper stabilization improved signal-to-noise ratio by 11dB while maintaining system level harmonic distortion performance.

Department dc:contributor.department

Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2008

Author dc:creator

• Jordy, Keith (Keith M.)

Advisor dc:contributor.advisor

• Joel Dawson.

• Electrical Engineering and Computer Science.

Statement dc:rights

• M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/1721.1/46167

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/46167