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Massachusetts Institute of Technology

Technology and market evaluation for semiconductor nanowire transistors

Abstract

dc:description.abstract

Information processing systems have been getting more powerful over the course of the past three decades due to the scaling of transistor dimensions. Scaling of transistor dimension causes a plethora of technological problems if pursued in the current fashion. Gate-All-Around architecture for transistors has been shown to alleviate many of the problems posed by scaling. Silicon being the material of choice of the semiconductor industry, it is highly desirable to have silicon one dimensional channel in the Gate-All- Around transistor. Silicon nanowires have been fabricated using various methods, in this work Self-Limiting-Oxidation was analyzed for its technological feasibility and found to be satisfactory. Possible value propositions and IP landscape analysis show that this methodology is very much feasible. As the new architecture essentially solves the problems that arise due to aggressive scaling, it becomes vital to look at the relevance of scaling beyond 45 nm technology node. Careful analysis of the semiconductor industry breakdown and top semiconductor foundries' financials reveal that scaling might not be pursued as aggressively as expected. The relevance of Moore's law in the current scheme of things could be that of a Self-fulfilling prophecy. Given this climate, Self Limiting Oxidation based Silicon nanowires have better commercial potential in the field of sensors. Monolithic integration and superior spatial precision makes this methodology ideally suited to the needs of applications which include many different kinds of sensors on the same Lab-on-Chip.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Materials Science and Engineering.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2008

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Omampuliyur, Rajamouly Swaminathan
Advisor dc:contributor.advisor
  • Eugene Fitzgerald.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/45154
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/45154

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Omampuliyur, Rajamouly Swaminathan. Technology and market evaluation for semiconductor nanowire transistors. Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/45154