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Massachusetts Institute of Technology

Engineered substrates for coplanar integration of lattice-mismatched semiconductors with silicon

Abstract

dc:description.abstract

As we approach the end of traditional CMOS scaling, further improvements in integrated circuit performance and functionality will become limited by the inherently low carrier mobility and indirect bandgap of silicon. These performance shortcomings can be supplemented with high performance semiconductors such as Ge and GaAs, which have respectively improved carrier mobilities and a direct bandgap for efficient light emission. However, due to the economic superiority of Si-based microelectronics, it is unlikely that the CMOS industry will abandon Si entirely. Instead, it will be necessary to integrate materials such as Ge and GaAs with the Si platform by means of engineered substrates. In this thesis, thin Ge layers were transferred to Si by wafer bonding of compositionally graded structures. This approach combines the beneficial aspects of graded buffers with those of wafer bonding to provide a coplanar integration platform for lattice-mismatched semiconductors. The various innovations that were necessary to realize epitaxial layer transfer from virtual substrates stem from the fact that thin films of Ge are difficult to planarize. The large surface roughness of graded buffers requires smoothing of the surface prior to bonding. The poor surface passivation of GeO2 in aqueous chemo-mechanical planarization (CMP) slurries necessitates that Ge virtual substrates be planarized indirectly, using a deposited CMP layer. Furthermore, H-induced exfoliation is the only practical method of separating a thin Ge layer from the surface of a virtual substrate, leading to extensive surface damage of the transferred layer.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Materials Science and Engineering.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2005

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Pitera, Arthur Joseph, 1975-
Advisor dc:contributor.advisor
  • Eugene A. Fitzgerald.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/30253
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/30253

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Pitera, Arthur Joseph, 1975-. Engineered substrates for coplanar integration of lattice-mismatched semiconductors with silicon. Massachusetts Institute of Technology, 2005. http://hdl.handle.net/1721.1/30253