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Massachusetts Institute of Technology

Fast offset compensation for a 10Gbps limit amplifier

Abstract

dc:description.abstract

A novel offset voltage compensation method is presented that significantly modifies the existing tradeoff between control loop bandwidth, and therefore total compensation time, and total output jitter. The proposed system achieves comparable output jitter performance to traditional approaches while significantly reducing the total compensation time by nearly three orders of magnitude. Traditional offset compensation methods are based on simple offset measurement techniques that generally rely on passive compensation blocks and exhibit a direct inverse relationship between total compensation time and resulting output jitter. Therefore, current high-speed data-link systems suffer from extremely long offset compensation loop settling times in order to satisfy the strict protocol jitter specifications. In the proposed system, the new CMOS peak detector design is the enabling component that allows us break this relationship and achieve extremely fast settling behavior while preventing data dependence of the control signal. Simulated results show that the implemented system can achieve output jitter performance similar to existing methods while dramatically improving the compensation time. Specifically, the proposed system can achieve less than 2pS of peak-to-peak jitter, or less than 700fS of RMS jitter, while reducing the total compensation time from roughly 500[mu]S to less than 1[mu]S. The system was implemented in National Semiconductor's CMOS9 0.18[mu]m CMOS process. Packaged parts will be tested to verify agreement with simulated performance.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2004

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Crain, Ethan A. (Ethan Alan), 1972-
Advisor dc:contributor.advisor
  • Michael H. Perrott.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
en_US

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/28380
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/28380

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Crain, Ethan A. (Ethan Alan), 1972-. Fast offset compensation for a 10Gbps limit amplifier. Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/28380