Delocalized Photonic Deep Learning on the Internet's Edge

Machine learning has become ubiquitous in our daily lives, providing unprecedented improvements in image recognition, autonomous driving and conversational AI. To enable this improvement the size of machine learning models has grown exponentially, requiring new hardware that scales accordingly. CMOS electronics, the workhorse of computing for the last half century, has hit a fundamental barrier to further improvement, limited by the high energy and bandwidth cost of metallic interconnects. In this thesis I will demonstrate how we can build systems making use of the physics of photonics and electronics to enable computing systems on lightweight edge devices that were previously infeasible by orders of magnitude. First, we consider a system where all metallic interconnects above the digital logic are replaced by optical fan-out. I propose a freely scalable digital optical neural network accelerator which replaces all non-local metallic wires in a digital systolic array with free-space optical interconnections enabled by fan-out and receiverless photodetectors. For the primary contribution of my thesis I explore making use of photonics to enable faster edge computing. Advanced machine learning models are currently impossible to run on edge devices such as smart sensors and unmanned aerial vehicles owing to constraints on power, processing, and memory. I introduce an approach to machine learning inference based on delocalized analog processing across networks. In this approach, named Netcast, cloud-based “smart transceivers” stream weight data to edge devices, enabling ultraefficient photonic inference. I demonstrate image recognition at ultralow optical energy of 40 attojoules per multiply (<1 photon per multiply) at 98.8% (93%) classification accuracy. I reproduce this performance in a Boston-area field trial over 86 kilometers of deployed optical fiber, wavelength multiplexed over 3 terahertz of optical bandwidth. My work allows milliwatt-class edge devices with minimal memory and processing to compute at teraFLOPS rates reserved for high-power (>100 watts) cloud computers.

Name thesis:degree_name

Doctoral

Department dc:contributor.department

Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2023

Author dc:creator

• Sludds, Alexander

Advisor dc:contributor.advisor

• Englund, Dirk R.

Statement dc:rights

• In Copyright - Educational Use Permitted
• Copyright retained by author(s)

Licence dc:rights.uri

• https://rightsstatements.org/page/InC-EDU/1.0/

Handle dc:identifier.uri

https://hdl.handle.net/1721.1/151701

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/151701