Dislocation engineering in InAlGaAs/SiGe alloy systems for heteroepitaxial integration

Semiconductor devices based on GaAs substrates use III-V alloy systems like Inx(AlyGa₁₋y)₁₋xAs for optoelectronic devices and high frequency communication applications. Heteroepitaxial integration of such devices with Si has generated a lot of interest because it has the potential of combining the desired material properties with the low cost of the Si manufacturing platform and enabling monolithic integration with Si CMOS, creating novel integrated circuits. However, heteroepitaxial integration introduces challenges related to detrimental crystal defects like dislocations that are created in the process and require buffer layers to accommodate such defects and minimize their impact on device performance. One buffer layer scheme that is receiving widespread adoption involves the direct growth of Ge on Si. It produces a threading dislocation density ~2x10⁷ cm⁻² but this density is too high for applications like high efficiency GaAs solar cells.

Name thesis:degree_name

Doctoral

Department dc:contributor.department

Massachusetts Institute of Technology. Department of Materials Science and Engineering

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2019

Author dc:creator

• Shah, Rushabh(Rushabh Dinesh)

Advisor dc:contributor.advisor

• Eugene A. Fitzgerald.

• Materials Science and Engineering.

Statement dc:rights

• MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

https://hdl.handle.net/1721.1/121594

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/121594