Physical redundancy for defect tolerance : example designs and fundamental limits

This project analyzes designs for physical redundancy which are modeled abstractly as a bipartite graph. The goal is to determine the characteristics of graph structures which optimize the trade-off between the number of edges and the number of redundant components or nodes needed while correcting a deterministic number of worst-case errors. This thesis looks at finite-sized designs, asymptotically large designs with finite error correcting values, and designs with asymptotically large error correcting values. Results include some small optimal graph structures and fundamental limits on what the optimal design structure can achieve for the cases where a small number of errors are corrected and for where the number of errors to be correctly grows asymptotically.

Department dc:contributor.department

Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2015

Author dc:creator

• Tang, Jennifer (Jennifer Susan)

Advisor dc:contributor.advisor

• Yury Polyanskiy.

• Electrical Engineering and Computer Science.

Statement dc:rights

• M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/1721.1/101588

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/101588